Lecture 015

Address Space

Memory Management Unit (MMU, hardware)

Memory Management Unit (MMU, hardware)

Linear address space: Ordered set of contiguous non-negative integer addresses Virtual address space: Set of N = 2^n virtual addresses Physical address space: Set of M = 2^m physical addresses

Purpose of Virtual Memory

Cache Mapping

Virtual Address

Page Table

page table: a software mapping function from virtual page to physical page

Page Fault

VM as Tool for Memory Management

Key Ideas:

virtual memory example

virtual memory example

mapping example

mapping example

VM as Memory Protection

bits in page table

bits in page table

Page Table Translation

N = 2^n: number of address in virtual address space M = 2^m: number of addresses in physical address space P = 2^p: page size (bytes)

Virtual Address (VA)

Physical Address (PA)

%cr3: control register, store address of page table in physical memory

Success Address Translation

  1. CPU request MMU to do memory translation, providing virtual address
  2. MMU fetch page table information using %cr3 register and virtual address
  3. MMU look at the content of page table entry and tells memory to send back data to CPU
  4. Memory return data to CPU
  5. Summary:

    Translation Success

    Translation Success

Page Fault Address Translation

  1. CPU request MMU to do memory translation, providing virtual address
  2. MMU fetch page table information using %cr3 register and virtual address
  3. MMU look at the content of page table entry, MMU trigger page fault
  4. page fault handler evict space in memory. if dirty, update to disk.
  5. page fault handler update page table content in memory and update memory
  6. page fault handler return to original process, retry instruction
  7. Summary:

    Translation Fail

    Translation Fail

Address Translation

Address Translation

Translation Lookaside Buffer (TLB)

TLB: store small amount of entry of Page Table in fast cache

Multi-Level Page Table

Problem: if 4KB page size, 48-bit address space, 8-byte PTE, then we need 512GB page table. Most of them are not allocated, <0.1% allocation.

Two-Level Page Table:

Two-Level

Two-Level
K-Level Page Table:

K-Level

K-Level

Some interesting facts

Implementation Detail of Page Table and TLB

Address Example: 14 bit virtual address, 12 bit physical address, 64 byte page size (64 entries)

Address Example: 9+9+9+9+12=48 virtual address, 40+12=52 physical address, 4KB page size (2^12 byte page table, 8 byte payload per entry, 2^9 entries)

TLB Example: 16 entries, 4-way associative

Normal Cache Example: 16 entries, 4-way associative

Actual Address Translation:

L1 Cache Optimization: if size of tag bits for normal cache equals the size of physical address number, then the index bits for normal cache does not have to be translated before cache access.

Virtual Address Space in Linux

Virtual Kernel Memory:

virtual kernel

virtual kernel

task_struct in OS

Linked list is used in OS to keep track memory areas:

Type of Page Fault:

Memory Mapping

Memory Mapping: VM areas initialized by associating them with disk objects

(Dirty pages are copied back and forth between memory swap)

Copy-on-Write

Copy-on-Write(COW): If a shared region of memory is going to be written by a process, it creates a minimal copy of written space for the specific process. Page table is used to keep track of new minimal memory.

Copy on Write

Copy on Write

Kernel Same-Page Merging

mmap()

A function to map disk file to virtual address

// Map [len] bytes starting at offset [offset] of the file specified
// by file description [fd], preferably at address [start]
// Return a pointer to start of mapped area (may not be [start])
void *mmap(void *start, int len, int prot, int flags, int fd, int offset)

Why mmap()

mmap

mmap

Calculation

Page table size must be page size because each entry in page table can either store PPN of next page table or of the final PPN. Therefore, from page size, we know how big is the page table (due to above equality) and how many bits are the PPO (due to final page size, or block size). From the page table size, we can potentially know how many entries in each page table, and therefore know how many page tables in total given virtual address space. Notice, each part of virtual address (9 bits) contain information of (12 bits, 40 bits from page table + 12 bits = physical address) because those bits are used as index, and due to alignment, lower bits are known.

When malloc do 1028KB or more allocation,

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