Architecture: Instruction Set Architecture (ISA). Parts of processor design for writing assembly. (e.g. registers)
Micro-architecture: implementation of architecture (eg. cache size and core frequency)
Programmer Visible States
PC: Program counter
Register File
Condition code
Memory
Assembly data type
integer or address of 1, 2, 4, 8 bytes
float of 4, 8, 10 bytes
SIMD vector data of 8, 16, 32, 64 bytes
code instructions (encoded by sequence of bytes)
where %esp(stack pointer) and %ebp(base pointer) are special
has x86 capability (IA32 registers)
contain
3 kinds operations in assembly
transfer data between memory and register
arithmetic function on register or memory
control flow and jumps, branches
%rdi: first argument %rsi: second argument %rax: third argument
movq [Source] [Dest]
$0x400
, $-533
%rax
, %r13
(but %rsp
is reserved for special use)(%rax)
Unix: [Source] [Dest] Win: [Dest] [Source]
Possible Combinations:
D(Rb, Ri, S)
= (Rb + Ri * S) + D
D: displacement of 8, 16, or 32 bits, default 0
Rb: base register (has to be one of 16 integer register)
Ri: index register (any except %%rsp), default 0
S: scale of 1, 2, 4, or 8, default 1
If above not specified, they are identity (0 or 1 depending on arithmetics)
leaq [Src], [Dst]
assembler: translate .s into .o
linker: resolve reference between files; run-time libraries; (some libraries are dynamically linked in run-time)
Disassemble: objdump -d sum
examining object code and bit patterns
can be run on a.out
or .o
files
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